may 2009 ?2009 fairchild semiconductor corporation FDMS8848NZ rev c 1 www.fairchildsemi.com 1 FDMS8848NZ n-channel powertrench ? mosfet FDMS8848NZ n-channel powertrench ? mosfet 40 v, 49 a, 3.1 m : features ? max r ds(on) = 3.1 m : at v gs = 10 v, i d = 22.8 a ? max r ds(on) = 5.1 m : at v gs = 4.5 v, i d = 17.5 a ? advanced package and silicon combination for low r ds(on) and high efficiency ? msl1 robust package design ? rohs compliant general description the FDMS8848NZ has been designed to minimize losses in power conversion application. advancements in both silicon and package technologies have been combined to offer the lowest r ds(on) while maintaining excellent switching performance. applications ? computing vr & imvp vcore ? secondary side synchronous rectifier ? pol dc/dc converter ? oring fet/ load switching g s s s d d d d 5 6 7 8 3 2 1 4 bottom power 56 top pin 1 g s s s d d d d mosfet maximum ratings t c = 25 c unless otherwise noted thermal characteristics package marking an d ordering information symbol parameter ratings units v ds drain to source voltage 40 v v gs gate to source voltage 20 v i d drain current -continuous (package limited) t c = 25 c 49 a -continuous (silicon limited) t c = 25 c 143 -continuous t a = 25 c (note 1a) 22.8 -pulsed 90 e as single pulse avalanche energy (note 3) 480 mj p d power dissipation t c = 25 c 104 w power dissipation t a = 25 c (note 1a) 2.5 t j , t stg operating and storage junction temperature range -55 to +150 c r t jc thermal resistance, junction to case 1.2 c/w r t ja thermal resistance, junction to ambient (note 1a) 50 device marking device package reel size tape width quantity FDMS8848NZ FDMS8848NZ power 56 13?? 12 mm 3000 units
www.fairchildsemi.com 2 ?2 009 fairchild semiconductor corporation FDMS8848NZ rev c 1 FDMS8848NZ n-channel powertrench ? mosfet electrical characteristics t j = 25 c unless otherwise noted off characteristics on characteristics dynamic characteristics switching characteristics drain-source diode characteristics symbol parameter test conditions min typ max units bv dss drain to source breakdown voltage i d = 250 p a, v gs = 0 v 40 v ' bv dss ' t j breakdown voltage temperature coefficient i d = 250 p a, referenced to 25 c 28 mv/c i dss zero gate voltage drain current v ds = 32 v, v gs = 0 v 1 p a i gss gate to source leakage current v gs = 20 v, v ds = 0 v 10 p a v gs(th) gate to source threshold voltage v gs = v ds , i d = 250 p a 1.0 1.7 3.0 v ' v gs(th) ' t j gate to source threshold voltage temperature coefficient i d = 250 p a, referenced to 25 c -6 mv/c r ds(on) static drain to source on resistance v gs = 10 v, i d = 22.8 a 2.6 3.1 m : v gs = 4.5 v, i d = 17.5 a 3.3 5.1 v gs = 10 v, i d = 22.8 a, t j = 125 c 3.8 5.3 g fs forward transconductance v ds = 10 v, i d = 22.8 a 130 s c iss input capacitance v ds = 20 v, v gs = 0 v, f = 1 mhz 6071 8075 pf c oss output capacitance 705 940 pf c rss reverse transfer capacitance 466 700 pf r g gate resistance 1.4 2.8 : t d(on) turn-on delay time v dd = 20 v, i d = 22.8 a, v gs = 10 v, r gen = 6 : 20 36 ns t r rise time 19 35 ns t d(off) turn-off delay time 63 101 ns t f fall time 13 24 ns q g total gate charge v gs = 0 v to 10 v v dd = 20 v, i d = 22.8 a 108 152 nc q g total gate charge v gs = 0 v to 5 v 57 80 nc q gs gate to source charge 17 nc q gd gate to drain ?miller? charge 19 nc v sd source to drain diode forward voltage v gs = 0 v, i s = 2.1 a (note 2) 0.7 1.2 v v gs = 0 v, i s = 22.8 a (note 2) 0.8 1.3 t rr reverse recovery time i f = 22.8 a, di/dt = 100 a/ p s 34 55 ns q rr reverse recovery charge 28 45 nc notes: 1. r t ja is determined with the device mounted on a 1in 2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of fr-4 material. r t jc is guaranteed by design while r t ca is determined by the user's board design. 2. pulse test: pulse width < 300 p s, duty cycle < 2.0%. 3. starting t j = 25 c, l =1 mh, i as = 31 a, v dd = 36 v, v gs = 10 v a. 50 c/w when mounted on a 1 in 2 pad of 2 oz copper. b. 125 c/w when mounted on a minimum pad of 2 oz copper.
www.fairchildsemi.com 3 ?200 9 fairchild semiconductor corporation FDMS8848NZ rev c 1 FDMS8848NZ n-channel powertrench ? mosfet typical characteristics t j = 25 c unless otherwise noted figure 1. 01234 0 15 30 45 60 75 90 v gs = 3.5 v v gs = 4.5 v pulse duration = 80 p s duty cycle = 0.5% max v gs = 3 v v gs = 10 v i d , drain current (a) v ds , drain to source voltage (v) on region characteristics figure 2. 0 153045607590 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 normalized drain to source on-resistance i d , drain current (a) v gs =10 v v gs = 4.5 v v gs = 3.5 v v gs = 3 v pulse duration = 80 p s duty cycle = 0.5% max n o r m a l i z e d o n - r e s i s t a n c e vs drain current and gate voltage f i g u r e 3 . n o r m a l i z e d o n r e s i s t a n c e -75 -50 -25 0 25 50 75 100 125 150 0.6 0.8 1.0 1.2 1.4 1.6 1.8 i d = 22.8 a v gs = 10 v normalized drain to source on-resistance t j , junction temperature ( o c ) vs junction temperature figure 4. 246810 0 2 4 6 8 10 t j = 125 o c i d = 22.8 a t j = 25 o c v gs , gate to source voltage (v) r ds(on) , drain to source on-resistance ( m : ) pulse duration = 80 p s duty cycle = 0.5% max o n - r e s i s t a n c e v s g a t e t o source voltage figure 5. transfer characteristics 01234 0 15 30 45 60 75 90 t j = 150 o c v ds = 5 v pulse duration = 80 p s duty cycle = 0.5% max t j = -55 o c t j = 25 o c i d , drain current (a) v gs , gate to source voltage (v) figure 6. 0.0 0.2 0.4 0.6 0.8 1.0 1.2 0.001 0.01 0.1 1 10 100 t j = -55 o c t j = 25 o c t j = 150 o c v gs = 0 v i s , reverse drain current (a) v sd , body diode forward voltage (v) s o u r c e t o d r a i n d i o d e forward voltage vs source current
www.fairchildsemi.com 4 ?200 9 fairchild semiconductor corporation FDMS8848NZ rev c 1 FDMS8848NZ n-channel powertrench ? mosfet figure 7. 0 20406080100120 0 2 4 6 8 10 i d = 22.8 a v dd = 25 v v dd = 15 v v gs , gate to source voltage (v) q g , gate charge (nc) v dd = 20 v gate charge characteristics figure 8. 0.1 1 10 40 100 1000 10000 f = 1 mhz v gs = 0 v capacitance (pf) v ds , drain to source voltage (v) c rss c oss c iss c a p a c i t a n c e v s d r a i n to source voltage figure 9. 0.01 0.1 1 10 100 1000 1 10 40 t j = 100 o c t j = 25 o c t j = 125 o c t av , time in avalanche (ms) i as , avalanche current (a) u n c l a m p e d i n d u c t i v e switching capability figure 10. 25 50 75 100 125 150 0 40 80 120 160 v gs = 4.5 v limited by package r t jc = 1.2 o c/w v gs = 10 v i d , drain current (a) t c , case temperature ( o c ) m a x i m u m c o n t i n u o u s d r a i n current vs case temperature f i g u r e 1 1 . f o r w a r d b i a s s a f e operating area 0.01 0.1 1 10 100200 0.01 0.1 1 10 100 200 10 s dc 100 ms 10 ms 1 ms 1 s i d , drain current (a) v ds , drain to source voltage (v) this area is limited by r ds(on) single pulse t j = max rated r t ja = 125 o c/w t c = 25 o c figure 12. 10 -3 10 -2 10 -1 110 100 1000 0.5 1 10 100 1000 2000 single pulse r t ja = 125 o c/w t c = 25 o c v gs = 10 v p ( pk ) , peak transient power (w) t, pulse width (sec) s i n g l e p u l s e m a x i m u m power dissipation typical characteristics t j = 25 c unless otherwise noted
www.fairchildsemi.com 5 ?200 9 fairchild semiconductor corporation FDMS8848NZ rev c 1 FDMS8848NZ n-channel powertrench ? mosfet figure 13. 10 -3 10 -2 10 -1 110 100 1000 1e-3 0.01 0.1 1 single pulse r t ja = 125 o c/w duty cycle-descending order normalized thermal impedance, z t ja t, rectangular pulse duration (sec) d = 0.5 0.2 0.1 0.05 0.02 0.01 2 p dm t 1 t 2 notes: duty factor: d = t 1 /t 2 peak t j = p dm x z t ja x r t ja + t a junction-to-ambient transien t thermal response curve typical characteristics t j = 25 c unless otherwise noted
www.fairchildsemi.com 6 ?2 009 fairchild semiconductor corporation FDMS8848NZ rev c 1 FDMS8848NZ n-channel powertrench ? mosfet dimensional outline and pad layout
FDMS8848NZ n-channel powertrench ? mosfet ?2 009 fairchild semiconductor corporation 7 www.fairchildsemi.com FDMS8848NZ rev c 1 trademarks the following includes registered and unregistered trademarks and service marks, owned by fairchild semiconductor and/or its gl obal subsidiaries, and is not intended to be an exhaustive list of all such trademarks. *trademarks of system general corporation, used under license by fairchild semiconductor. disclaimer fairchild semiconductor reserves the right to make changes without further notice to any products herein to improve reliability, function, or design. fairchild does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any li cense under its patent rights, nor the rights of others. these specifications do not expand the terms of fairchild?s worldwide terms and conditions, specifically the warranty therein, which covers these products. life support policy fairchild?s products are not authorized for use as critical components in life support devices or systems without the express written approval of fairchild semiconductor corporation. as used herein: 1. life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. 2. a critical component in any component of a life support, device, or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. product status definitions definition of terms auto-spm? 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